This invention relates to electronic circuits and, more particularly, to general purpose test systems capable of testing very large scale integrated (VLSI) circuits, including microprocessors, logic arrays, and multi-chip assemblies, at high speeds. Specifically, the invention is directed to a method and apparatus for automatically testing one or more electrical properties of a series of electronic circuits by applying and monitoring test signals during testing of the electronic circuits in an automated electronic test system.
In automated electronic test equipment, one or more electrical signal sources is coupled to the pins or other nodes at the inputs of an electronic device being tested to force stimuli signals controlled by a test system computer onto the device under test, and the resultant conditions at the outputs of the device being tested are monitored. Typically, the stimuli signals represent logic states or analog voltages or currents which are applied in a parallel pattern to the input pins of the device under test, and the resulting output pattern is checked in parallel.
The signal sources apply stimuli signals to the device under test through pin electronics interface circuits which function as computer controlled interface circuits between the computer of the test system and the individual pins of the device being tested. The pin electronics interface circuits receive these stimuli signals and then through input drivers included in the pin electronics interface circuits switch these stimuli signals onto the desired input pins of the device under test in accordance with a stored program in the test system. The pin electronics interface circuits also receive reference voltages or currents which comparator circuits included in the pin electronics interface circuits compare to the voltages or currents received from the output pins of the device being tested. The output signals from the comparator circuits are returned to the test system computer where they are checked in accordance with a stored program for the proper responses. In this manner, electronic components, for example, semiconductor memories or other integrated circuits, can be individually tested to assure that they meet whatever standard or specifications the ultimate user of the integrated circuit desires.
Considered in more detail, known static measurement circuitry has a single voltage or current force mode programmable precision measurement unit connected to the input pins of the device being tested via a relay matrix included in the pin electronics interface circuits. Single limit analog comparison techniques are typically used for go/no-go measurement speed. Measured value results are generally acquired via a software search routine. In some automated electronic test equipment, the constant voltage signal source can be reconfigured for constant current operation. Mode reconfiguration switching and low current ranges typically limit analog speed to that required to maintain stable operation with a maximum specified capacitive load. One disadvantage in the operation of such automated electronic test equipment, however, is the voltage transients caused by reconfiguration which result in disturbances in the operation of the automated electronic test equipment. Relay switching during configuration change while connected to the device under test causes aberrations due to the disturbances caused by the voltage transients.
Bias supplies used as the signal sources have traditionally been digitally programmed bipolar operational power amplifiers. Another disadvantage in the operation of such automated electronic test equipment, however, is the destruction of the evidence of failure of the device under test.
Some form of voltage clamping is typically provided in the current force mode to protect the device being tested from compliance voltage, but only when sequencing the precision measurement unit connection from one input pin to the next. Programmable current clamps are occasionally included, but the only limit on power delivered to the load is typically a hardware self protect mechanism.
As circuits increase in density and gate count, they become more of a power sink or load source. This causes concern when the device under test has a tendency toward short circuit if the device is defective. The automated electronic test equipment can destroy the evidence of failure.
While known precision measurement units have some capability to respond to sudden current demand changes, their worst case compensated slow dynamic response can cause damaging transients to occur. Sensing of an out of tolerance condition when a device being tested is powered up provides the desired early fail indication, but without fast power limiting, destruction of fail evidence and/or the device under test to precision measurement unit connection path can result.